1/4 rev. a structure silicon monolithic integrated circuit product name overvoltage protection controller with internal fet model name bd6041gul features overvoltage protection up to 28v internal low ron (125m ? ) fet over voltage lockout (ovlo) under voltage lockout(uvlo) internal 2msec startup delay over current protect thermal shut down small package: vcsp50l1(1.6mm x 1.6mm, height=0.55mm) absolute maximum ratings (ta=25 ) contents symbol rating unit conditions input supply voltage 1 vmax1 -0.3 30 v in input supply voltage 2 vmax2 -0.3 7 v other power dissipation pd 725 mw operating temperature range topr -35 +85 storage temperature range tstr -55 +150 1 when using more than at ta=25 , it is reduced 5.8 mw per 1 . rohm specification board 50mm 58mm mounting. o perating range (ta=-35 +85 ) parameter symbol range unit usage input voltage range v in 2.2 28 v this product is not especially designed to be protected from radioactivity.
2/4 rev. a electrical characteristics (unless otherwise noted, ta = 25 ? c, in=5v) parameter symbol rating unit conditions min. typ. max. electrical input voltage range vin - - 28 v supply quiescent current icc 45 90 ? ? ? ? ? timings start up delay ton - 2 4 msec ok going up delay tok - 10 15 msec output turn off time toff - 2 10 ? ?
3/4 rev. a block diagram pin number/pin name pin descriptions pin name function a2, a3 b2, b3 in1, 2, 3, 4 input voltage pin. a 1 ? package dimensions (vcsp50l1) pin number pin name a2 in1 a3 in2 b2 in3 b3 in4 a1 out1 b1 out2 c3 gnd c1 ok c2 en 6041 lot no.
4/4 rev. a use-related cautions (1) absolute maximum ratings if applied voltage (vdd, vin), operating temperature range (topr), or other absolute maximum rati ngs are exceeded, there is a r isk of damage. since it is not possible to identify short, open, or other damage mode s, if special modes in which absolute maximum ratings are excee ded are assumed, consider applying fuses or ot her physical safety measures. (2) recommended operating range this is the range within which it is possible to obtain roughl y the expected characteristics. for electrical characteristics, it is those that are guaranteed under the conditions for each parameter. ev en when these are within the recommended operating range, voltage and temperature c haracteristics are indicated. (3) reverse connection of power supply connector there is a risk of damaging the lsi by reverse connection of the power supply connector. for protection from reverse connectio n, take measures such as externally placing a diode between the power supply and the power supply pin of the lsi. (4) power supply lines in the design of the board pattern, make pow er supply and gnd line wiring low impedance. when doing so, although the digital power s upply and analog power supply are the same pot ential, separate the digital power sup ply pattern and analog power supply pattern to deter digital noise from entering the analog power supply due to the common impedance of the wiring pat terns. similarly take pattern design into account for gnd lines as well. furthermore, for all power supply pins of the lsi, in conjunction with inserting cap acitors between power supply and gnd pins, when using electrolytic capacitors, determine constants upon adequate ly confirming that capacita nce loss occurring at low temperatures is not a problem for various characteristics of the capacitors used. (5) gnd voltage make the potential of a gnd pin such that it will be the lowest potential even if operating below that. in addition, confirm t hat there are no pins for which the potential becomes less than a gn d by actually including transition phenomena. (6) shorts between pins and misinstallation when installing in the set board, pay adequate attention to orientation and placement di screpancies of the lsi. if it is insta lled erroneously, there is a risk of lsi damage. there also is a risk of damage if it is shorted by a foreign substance getting between pins or between a p in and a power supply or gnd. (7) operation in strong magnetic fields be careful when using the lsi in a strong magnetic field, since it may malfunction. (8) inspection in set board when inspecting the lsi in the se t board, since there is a risk of stress to the lsi when capacitors are connected to low imped ance lsi pins, be sure to discharge for each process. moreover, when getting it on and off of a jig in the inspection pro cess, always connect it after t urning off the power supply, perform the inspection, and remove it afte r turning off the power supply. furthermor e, as countermeasures against static elect ricity, use grounding in the assembly process and take appropria te care in transport and storage. (9) input pins parasitic elements inevitably are formed on an lsi structure due to potential relationships. because parasitic elements operat e, they give rise to interference with circuit operation and may be the cause of malfunc tions as well as damage. acco rdingly, take care not to appl y a lower voltage than gnd to an input pin or use the lsi in other wa ys such that parasitic elements operate. moreover, do not apply a voltage to an inpu t pin when the power supply voltage is not being applied to the lsi. furthermore, when the power supply voltage is being applied, make each input pin a vo ltage less than the power supply voltage as well as within the guarant eed values of electrical characteristics. (10) ground wiring pattern when there is a small signal gnd and a large current gnd, it is r ecommended that you separate the large current gnd pattern and small signal gnd pattern and provide single point grounding at the reference point of the set so th at voltage variation due to resistance compon ents of the pattern wiring and large currents do not cause the small signal gnd voltage to change. take care that the gnd wiring pattern of externally attach ed components also does not change. (11) externally at tached capacitors when using ceramic capacitors for externa lly attached capacitors, determine constant s upon taking into account a lowering of th e rated capacitance due to dc bias and capacitance change due to factors such as temperature. (12) thermal shutdown circuit (tsd) when the junction temperature reaches the defined value, the ther mal shutdown circuit operates and turns a switch off. the the rmal shutdown circuit, which is aimed at isolating the lsi from thermal runaway as much as possible, is not aimed at the protection or guarantee of th e lsi. therefore, do not continuously use the lsi with this circuit operating or use the lsi assuming its operation. (13) thermal design perform thermal design in which there are adequate margins by taking into account the permissibl e dissipation (pd) in actual st ates of use.
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